01 Introduction to MOSFET

If the transistor can be called the greatest invention of the twentieth century, the MOSFET undoubtedly deserves much of the credit. A patent on the basic principle of the MOSFET was published in 1925, and in 1959 Bell Labs developed a MOSFET structure based on that principle. Sixty years on, everything from large power converters to the memory and CPU at the heart of electronic devices relies on MOSFETs.

02 Basic operating principle

Fundamentals: semiconductors. Metal conducts and insulating material does not, so how can something both conduct and not conduct? Through a semiconductor. As a semiconductor device, the function required of a MOSFET is, in the simplest terms, to both complete and break a circuit. In digital circuits this is how zero and one are realised; in power circuits it is the basic means of making a PWM converter work.

How is conduction achieved? A material conducts when it contains freely moving electrons (negative charge) or holes (positive charge); if electrons or holes are bound by the lattice, they cannot conduct. A material conducts when charge carriers are present. How is blocking achieved? By removing free carriers from a given region, so that the material cannot conduct and current is blocked.

The most widely used semiconductor material, silicon, is a group IV element with four outer electrons and can form a stable lattice, so it does not conduct on its own. As the figure below shows, all electrons and nuclei are firmly bound in a stable structure and there are no freely moving charges.

Stable silicon structure

When other elements, such as group III or group V elements or even others, are doped into the material and replace lattice sites, the situation changes. Doping with a group V element leaves one electron beyond the four needed for the outer shell, so electrons become the majority carrier. Doping with a group III element leaves the structure one electron short of a stable configuration, creating a hole, so holes become the majority carrier. In the figure below, the left diagram shows group V doping, where the dopant has five outer electrons and four participate in covalent bonds, leaving one extra electron; the right diagram shows group III doping, where the dopant has three outer electrons, all used in covalent bonds, leaving a hole. For convenience, electrons and holes can be understood directly as negative and positive charge.

Structure after doping

Charged particles move in an electric field. If an electric field drives both electrons and holes out of a region, no freely moving carriers remain there and the region no longer conducts. Such a region is called a depletion region, in which carriers have been depleted by the field. It is important to remember that a depletion region contains no freely moving carriers and is therefore in the blocking state. The core principle of the MOS is to use an electric field to make a given region alternately conduct and block.

The core of the MOSFET. Why is it called a MOSFET? The full name is metal-oxide-semiconductor field-effect transistor, and the name is closely tied to the structure. In the core structure shown below, taking only a portion for illustration, the layers from top to bottom are metal, oxide and doped semiconductor, giving metal-oxide-semiconductor.

Parallel plate model

And what is a field-effect transistor? The field here is the electric field, so a FET is a transistor driven by an electric field. Applying a positive voltage across the plates establishes an electric field in the material, shown by the green lines below.

Because the material here is P doped with a group III element, the red region contains holes, that is positive charge. Under the applied field the positive charge moves downward, leaving a region at the upper surface free of carriers, the depletion region.

Formation of the depletion layer

When the applied voltage is high enough, the holes in the depletion layer are driven further away and electrons are attracted to the upper surface, where they accumulate as conducting electrons, forming N-type semiconductor and thus an inversion layer. It is called an inversion layer because, under the electric field, the free carriers in that region are opposite to those created by doping. The voltage at which the inversion layer begins to form is generally called the threshold voltage. The inversion layer is the conducting channel referred to later, formed along the horizontal direction.

Formation of the inversion layer

Simulation of conducting channel formation:

Simulation of inversion layer formation

MOSFET operating principle

Taking a planar enhancement mode N-channel MOSFET as an example, the basic structure is shown below. From left to right the doping is NPN, and diffusion naturally forms the dark red depletion regions shown. As explained above, a depletion region cannot conduct, so drain and source are disconnected when no external field is applied and the structure is normally off.

MOSFET normally off

Note that the central region of the figure is the core described earlier: from top to bottom the orange, yellow and light red layers are metal, oxide and P doping. So how is the MOSFET turned on? Through the channel.

When Vgs is greater than zero, a new depletion region begins to form under the oxide layer, as shown below.

Depletion layer formation

When Vgs exceeds Vth, an inversion layer forms, as shown below.

Inversion layer formation

Because the inversion layer behaves like N doped semiconductor, drain and source are directly connected, the conducting channel is formed and the MOSFET turns on.

03 Output characteristics

The figure below shows the output characteristics of an enhancement mode N-channel MOSFET.

This MOSFET has three operating regions, as shown below.

04 Symbols and naming

The MOSFET family

Gate symbol. Unlike a JFET, the gate of a MOSFET is not connected to the conducting channel but separated by an oxide insulating layer. The symbol therefore shows a gap between gate and channel, either two vertical lines or one vertical line and three dashed segments, whereas a JFET uses a single vertical line. Note also that some gates are drawn as an L shape and others as a T; an L shape means the gate and source are physically closer together.

Channel shape. An enhancement mode MOSFET is normally off without external voltage, while a depletion mode MOSFET is normally on. The channel of an enhancement mode device is therefore drawn as three dashed segments, meaning not yet conducting, while the channel of a depletion mode device is a solid line.

Arrow direction. For MOSFETs with a bulk connection, the arrow distinguishes P-channel from N-channel. The rule is that P points to N: if the channel is P, the arrow points outward from the channel; if the channel is N, the arrow points inward toward the channel.

05 Market and applications

In the Chinese MOSFET market Infineon ranks first, and among domestic companies CR Micro, Yangjie Technology, Nexperia acquired by Wingtech, and Jilin Sino-Microelectronics have entered the top ten. As downstream demand in China expands rapidly, domestic MOSFET production and sales keep growing and import substitution becomes increasingly evident. The Chinese superjunction MOSFET market is currently dominated by major international suppliers, whose products are relatively expensive.

Supported by national industrial policy and rising technical capability, Chinese MOSFET companies continue to increase market share through cost effective products, and the level of localisation keeps improving. Power MOSFETs, especially high end discrete superjunction devices, still depend heavily on imports because of their technical and process complexity, leaving substantial room for import substitution.

The Chinese MOSFET market was worth about 5.66 billion US dollars in 2023. Consumer electronics, communications, industrial control and automotive electronics are the main downstream segments, with consumer and automotive electronics the largest. In consumer electronics, upgrades of motherboards and graphics cards, fast charging and the continued spread of Type-C interfaces keep driving demand. In automotive electronics, MOSFETs play an important role in power control systems such as electric motor auxiliary drives, electric power steering and motor drives, and in power conversion modules such as battery management systems, giving them broad market and development prospects.

06 AEC-Q101 qualification for automotive MOSFETs

AEC stands for Automotive Electronics Council. It was founded in 1994 by Chrysler, Ford and General Motors, and its membership now spans major vehicle makers, automotive electronics companies and semiconductor manufacturers worldwide. Components that comply with AEC specifications can be adopted by all three manufacturers at the same time, which encouraged part makers to exchange product characteristic data, drove standardisation of automotive parts and laid the foundation for the rapid growth of the automotive parts market. AEC-Q is the automotive reliability test standard issued by the AEC and an important passport for part makers entering automotive electronics and tier one supply chains.

1. AEC-Q101 is the entry threshold for automotive-grade discrete semiconductors. AEC-Q101 is a failure mechanism based stress test qualification for discrete semiconductor devices, issued by the AEC committee. It is the comprehensive reliability test and qualification standard for automotive discrete semiconductors and the basic threshold for discrete devices used in vehicles. The first version was published in 1996, and the current version is Revision E, published on 1 March 2021.

AEC-Q101 defines the necessary tests that discrete semiconductor devices must perform and pass, depending on product type, package outline and sample size requirements.

2. Discrete devices required to pass AEC-Q101. Diodes, Zener diodes, voltage regulator diodes, rectifier diodes, TVS diodes, MOSFETs, IGBTs and similar.

3. AEC-Q101 product validation flow

4. AEC-Q101 test groups

Parameter testing: performance, appearance, parameter verification, physical dimensions, thermal resistance, avalanche capability, short circuit reliability, dielectric integrity and similar.

Environmental stress testing: stress tests performed according to military electronic device environmental standards and general automotive electronic environmental standards, such as high temperature reverse bias, high temperature gate bias, temperature cycling, pressure cooker, HAST, high temperature high humidity reverse bias, high temperature high humidity operating, intermittent operational life, power temperature cycling, constant acceleration, vibration, shock and hermeticity.

Process quality assessment: process quality assessment of the component covering packaging, subsequent electronic assembly processes and use reliability, such as ESD, DPA, terminal strength, solvent resistance, resistance to soldering heat, solderability, wire pull and shear, die push and lead-free testing.

5. NTEK testing capability against AEC-Q101 requirements

About NTEK

NTEK Group was founded in 2009 and is headquartered in Shenzhen. The group provides quality research and technical services covering R&D verification, inspection and testing, failure analysis, simulation and market access for intelligent connected vehicles, electronic communications and new energy.

NTEK has extensive experience in automotive-grade electronic certification and has helped more than 100 companies pass AEC-Q series certification. Driven by the need of vehicle makers to localise automotive-grade components and supported by the domestic semiconductor industry, NTEK provides comprehensive testing and certification services, applying AEC-Q automotive standards to control the safety and quality of automotive components, supporting the growth of domestic automotive-grade components and adding new momentum to the intelligent vehicle safety system.